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Dot Matrix LED Unit for Indoor Use LT1550ED(Chip Type)
s Features
No. of dots : 16!32dots Outline dimensions : 64.0!128.0mm Dot size : 3.0!3.0mm Dot pitch : 4.0mm Radiation color : Yellow-green+Red(dichromatic type) Driving method : 1/16 duty dynamic drive
LT1550ED
s Absolute Maximum Ratings
Parameter Supply voltage for IC Supply voltage for LED Input voltage Turn-on time Operating temperature Storage temperature Power dissipation *1 25% or less of lighting Symbol VCC VLED V1 tON Topr Tstg P Rating -0.3 to +5.5 -0.3 to +4.5 -0.3 to Vcc+0.3 1 -10 to +60*1 -20 to +70 20
(Ta=25C)
s Electrical Characteristics
Parameter Supply voltage for IC Supply voltage for LED IC current dissipation*1 LED current dissipation*1
(VCC=5V,VLED=4V,Ta=25C)
Unit V V V ms C C W
s Optical Characteristics
Parameter Red Luminance Yellow-green Viewing angle Red Peak emission wavelength Yellow-green Symbol Lv 21/2 p
Symbol MIN. TYP. MAX. Unit 4.75 5.0 VCC 5.25 V 3.75 4.0 VLED 4.25 V -----140 200 ICC mA -----3.8 4.2 ILED A 3.5 ----------VIH V Input voltage ----------1.5 VIL V ----------0.1 A IIH Input current ----------0.12 mA IIL Clock frequency ----------10 fCLK MHZ 70 Frame frequency 250 1 000 HZ fFR *1 Under the condition that dichromatic all dots are lit.
(VCC=5V,VLED=4V,Ta=25C)
TYP. 120 180 120 635 565
Unit cd/m nm
2
s Timing Chart
tsu CLOCK R&G DATA R&G DATA(OUT) LATCH VD(n) data ON VD(n+1) data td(C-L) t dD t WL td(L-C) t WENA OFF VD(n+1) data ON 1/ f ENA ADDRESS (A0 to A3) VD(n) td(L-A) td(E-A) td(A-E) VD(n+1) OFF VD(n+2) data th t WCLK
s Terminal Functions
Connector Symbol VLED Power supply VCC (CN1) GND A0 to A3 RDATA GDATA Input signal (CN2) LATCH ENABLE CLOCK GND A0 to A3 Function Supply voltage for LED (+4V) Supply voltage for IC (+5V) Ground Address specification signal for row driver Serial data input for red (H=ON, L=OFF) Serial data input for yellow-green (H=ON, L=OFF) Latch signal of display data. H: Serial data is converted to parallel data. L: Contents are latched.
ENABLE
s Block Diagram
Input/output circuit
331 HC367 473
OUT
IN
A0 A1 A2 A3 RDATA GDATA LATCH ENABLE CLOCK
Controls ON/OFF of LED (H: LED OFF) Clock signal for data transmission in the shift-register. (LH: serial data is shifted.)
A0 A1 A2 A3 RDATA GDATA LATCH ENABLE CLOCK
16!16DOT!2 DICHROMATIC LED MATRIX
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32BIT SHIFT-REGISTER, LATCH, DRIVER AND LUMINANCE ADJUSTMENT CIRCUIT
32BIT SHIFT-REGISTER, LATCH, DRIVER AND LUMINANCE ADJUSTMENT CIRCUIT
Ground for signal Buffered input signal Input signal generated through 32-bit shift register RDATA or buffer Input signal generated through 32-bit shift register Output GDATA signal or buffer (CN3) Buffered input signal LATCH ENABLE Buffered input signal CLOCK Buffered input signal GND Ground for signal Each signal is used as input signal for next unit. * As for the terminal number, refer to the outline dimensions.
4 TO 16 DECODER
Pch FET DRIVER
16
4
128 HD0
+0 -0.8
512-3t chip LED
8.2
64 HD15 VD0 Data shift direction VD31
+0 -0.5
110 44.0 15.0
0.25
44.0
54 22.0 10.0 19.7
1
CN3
0.25
VR2
7 1
IN CN2
10
10
VR1
CN1
1
6-M3 Insert nut (Effective screw depth 4.0) Pin connection CN1(Power supply) CN2(Input signal) CN3(Output signal)
Pin No. 1 2 3 4 5 6 7 Name VLED VLED VLED VCC GND GND GND Pin No. 1 2 3 4 5 6 7 8 9 10 Name A0 A1 A2 A3 RDATA GDATA LATCH ENABLE CLOCK GND Pin No. 1 2 3 4 5 6 7 8 9 10 Name A0 A1 A2 A3 RDATA GDATA LATCH ENABLE CLOCK GND
LT1550ED
19.7
OUT

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